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page 1 of 12 document no. doc-14514-3 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. figure 1. functional diagram product specification ultracmos ? spdt rf switch 100 ? 6000 mhz pe42420 features ?? harp? technology enhanced ?? no gate and phase lag ?? no drift in insertion loss and phase ?? high linearity ?? iip3 of 65 dbm ?? high isolation ?? 69 db @ 1 ghz ?? 62 db @ 3 ghz ?? 50 db @ 6 ghz ?? supports +1.8v control logic ?? 105c operating temperature ?? high esd tolerance ?? 4kv hbm on rfc ?? 2kv hbm on all other pins product description the pe42420 is a harp? technology-enhanced absorptive spdt rf switch designed for use in 3g/4g wireless infrastructure and other high performance rf applications. it is ideal for transmit path switching, rf and if signal routing, agc loops, and filter bank switching applications. this general purpose switch is comprised of two symmetric rf ports and has exceptional port to port isolation up to 6 ghz. an integrated cmos decoder facilitates a two-pin low voltage cmos control interface. in addition, no external blocking capacitors are required if 0v dc is present on the rf ports. the pe42420 is manufactured on peregrine?s ultracmos ? process, a patented variation of silicon-on-insulator (soi) technology on a sapphire substrate. peregrine?s harp? technology enhancements deliver high linearity and excellent harmonics performance. it is an innovative feature of the ultracmos ? process, offering the performance of gaas with the economy and integration of conventional cmos. figure 2. package type 20-lead 4x4 mm lga doc-02177
product specification pe42420 page 2 of 12 document no. doc-14514-3 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. table 1. electrical specifications @ +25c, v dd = 3.0v (z s = z l = 50 ? ) notes: 1. insertion loss and return loss can be improved by external matching 2. the input 1db compression point is a linearity figure of merit. refer to table 3 for the maximum operating power p in (50 ? ) parameter path condition min typ max unit operating frequency 100 6000 mhz insertion loss rfc?rfx 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 1 3000?4000 mhz 1 4000?5000 mhz 1 5000?6000 mhz 1 0.95 0.95 1.00 1.15 1.25 1.60 1.15 1.15 1.20 1.35 1.55 1.90 db db db db db db isolation rfx?rfx 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 3000?4000 mhz 4000?5000 mhz 5000?6000 mhz 67 63 59 60 54 44 69 64 62 64 60 50 db db db db db db isolation rfc?rfx 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 3000?4000 mhz 4000?5000 mhz 5000?6000 mhz 69 65 63 62 52 44 71 67 68 67 57 48 db db db db db db return loss (all ports) 100?4000 mhz 4000?5000 mhz 1 5000?6000 mhz 1 20 15 13 db db db input 1 db compression point 2 rfc?rfx 100?6000 mhz 33 dbm input ip2 rfc?rfx 100?6000 mhz 110 dbm input ip3 rfc?rfx 100?6000 mhz 60 65 dbm switching time 50% ctrl to 90% or 10% rf 300 400 ns
product specification pe42420 page 3 of 12 document no. doc-14514-3 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. table 1a. electrical specifications @ +105c, v dd = 2.3v to 5.5v (z s = z l = 50 ? ) notes: 1. insertion loss and return loss can be improved by external matching 2. the input 1db compression point is a linearity figure of merit. refer to table 3 for the maximum operating power p in (50 ? ) parameter path condition min typ max unit operating frequency 100 6000 mhz insertion loss rfc?rfx 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 1 3000?4000 mhz 1 4000?5000 mhz 1 5000?6000 mhz 1 1.05 1.10 1.25 1.35 1.50 1.60 1.25 1.35 1.45 1.75 2.00 2.00 db db db db db db isolation rfx?rfx 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 3000?4000 mhz 4000?5000 mhz 5000?6000 mhz 66 63 59 60 54 44 68 64 62 64 60 50 db db db db db db isolation rfc?rfx 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 3000?4000 mhz 4000?5000 mhz 5000?6000 mhz 68 65 62 62 51 44 70 67 67 67 55 48 db db db db db db return loss (all ports) 100?4000 mhz 4000?5000 mhz 1 5000?6000 mhz 1 19 15 13 db db db input 1 db compression point 2 rfc?rfx 100?6000 mhz 33 dbm input ip2 rfc?rfx 100?6000 mhz 110 dbm input ip3 rfc?rfx 100?6000 mhz 60 65 dbm switching time 50% ctrl to 90% or 10% rf 300 400 ns
product specification pe42420 page 4 of 12 document no. doc-14514-3 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. pin # pin name description 1, 2, 4-7, 9, 10-12, 14, 15, 18, 19 gnd ground 3 rf1 1 rf port 8 rfc 1 rf common 13 rf2 1 rf port 16 ctrl2 digital control logic input 2 17 ctrl1 digital control logic input 1 20 v dd supply voltage pad gnd exposed pad: ground for proper operation table 2. pin descriptions table 4. absolute maximum ratings parameter/condition symbol min max unit supply voltage v dd -0.3 5.5 v digital input voltage (ctrl1, ctrl2) v ctrl -0.3 3.6 v operating power (rfc-rfx) 1 p in 30 dbm power into termination (rfx) 1 p max 20 dbm storage temperature range t st -65 +150 c esd voltage hbm 2 rfc all other pins v esd 4000 2000 v v esd voltage mm 3 , all pins v esd 100 v maximum die junction temperature t jmax +125 c figure 3. pin configuration (top view) note 1: rf pins 3, 8 and 13 must be at 0v dc. the rf pins do not require dc blocking capacitors for proper oper ation if the 0v dc requirement is met table 3. operating ranges parameter symbol min typ max unit supply voltage v dd 2.7 5.5 v supply current v dd = 2.7 to 5.5v i dd 120 200 a digital input high (ctrl1, ctrl2) v ih 1.17 3.6 v digital input low (ctrl1, ctrl2) v il -0.3 0.6 v digital input current i ctrl 9 12 a maximum operating power (rfc-rfx) 1 p in 30 dbm maximum power into termination (rfx) 1 p max 20 dbm operating temperature range t op -40 +105 c notes: 1. 100% duty cycle, all bands, 50 ? notes: 1. 100% duty cycle, all bands, 50 ? 2. human body model (mil-std 883 method 3015) 3. machine model (jedec jesd22-a115) exceeding absolute maximum ratings may cause permanent damage. operation should be restricted to the limits in the operating ranges table. operation between operating range maximum and absolute maximum for extended periods may reduce reliability.
product specification pe42420 page 5 of 12 document no. doc-14514-3 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. electrostatic discharge (esd) precautions when handling this ultracmos ? device, observe the same precautions that you would use with other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the specified rating. latch-up avoidance unlike conventional cmos devices, ultracmos ? devices are immune to latch-up. table 5. truth table moisture sensitivity level the moisture sensitivity level rating for the pe42420 in the 20-lead 4x4 mm lga package is msl3. note 1: ctrl1 = high and ctrl2 = high are not supported ctrl1 ctrl2 rfc ? rf1 rfc ? rf2 low low off off low high off on high low on off high high n/a 1 n/a 1 switching frequency the pe42420 has a maximum 25 khz switching frequency. switching frequency describes the time duration between switching events. switching time is the time duration between the point the control signal reaches 50% of the final value and the point the output signal reaches within 10% or 90% of its target value. switching time is provided in table 1 . spurious performance the typical spurious performance of the pe42420 is ?155 dbm.
product specification pe42420 page 6 of 12 document no. doc-14514-3 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. typical performance data @ 25c and v dd = 3.0v unless otherwise specified figure 4. insertion loss (rfc-rfx) figure 5. insertion loss vs temp (rfx-rfc) figure 6. insertion loss vs v dd (rfx-rfc) figure 7. rfc port return loss vs temp (rf1 active) figure 8. rfc port return loss vs v dd (rf1 active)
product specification pe42420 page 7 of 12 document no. doc-14514-3 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. typical performance data typical performance data@ 25c and v dd = 3.0v unless otherwise specified (continued) figure 9. rfc port return loss vs temp (rf2 active) figure 10. rfc port return loss vs v dd (rf2 active) figure 11. active port return loss vs temp (rf1 active) figure 12. active port return loss vs v dd (rf1 active) figure 13. terminated port return loss vs temp (rf1 active) figure 14. terminated port return loss vs v dd (rf1 active)
product specification pe42420 page 8 of 12 document no. doc-14514-3 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. typical performance data@ 25c and v dd = 3.0v unless otherwise specified (continued) figure 18. isolation vs v dd (rfc-rfx) figure 17. isolation vs temp (rfc-rfx) figure 15. isolation vs temp (rfx-rfx) figure 16. isolation vs v dd (rfx-rfx)
product specification pe42420 page 9 of 12 document no. doc-14514-3 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. evaluation kit the spdt switch evaluation board was designed to ease customer evaluation of peregrine?s pe42420. the rf common port is connected through a 50 ? transmission line via the top sma connector, j2. rf1 and rf2 ports are connected through 50 ? transmission lines via sma connectors j1 and j3, respectively. a 50 ? through transmission line is available via sma connectors j4 and j5, which can be used to calculate the loss of the pcb. j6 provides dc and digital inputs to the device. the board is constructed of a four metal layer material with a total thickness of 36 mils. to achieve high isolation, the 50 ? transmission lines are designed in layer 2 using a stripline waveguide design. the board stack up for 50 ? transmission lines has 10 mil thickness of rogers 4350 between layer 1 and layer 2, and 10 mil thickness of rogers 4350 between layer 2 and layer 3. for the true performance of the pe42420 to be realized, the pcb should be designed in such a way that rf transmission lines and sensitive dc i/o traces are heavily isolated from one another. figure 19. evaluation board layouts prt-11505
product specification pe42420 page 10 of 12 document no. doc-14514-3 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. figure 20. evaluation board schematic doc-14527 50 ohm t-line 50 ohm t-line 50 ohm t-line 50 ohm t-line 1 2 j2 smasm 1 2 j5 smasm 1 1 3 3 5 5 7 7 2 2 4 4 6 6 8 8 10 10 12 12 14 14 13 13 9 9 11 11 j 6 header 7x2 1 2 j3 smasm 1 2 j4 smasm 7 gnd 2 gnd 3 rf1 4 gnd 5 gnd 6 gnd 1 gnd 8 rfc 9 gnd 10 gnd 12 gnd 11 gnd 13 rf2 14 gnd 15 gnd 16 c2 17 c1 18 gnd 19 gnd 20 vdd u1 pe42420 1 2 j1 smasm c1 0.1 uf c4 22pf c2 22pf c3 22pf r3 0ohm r4 0ohm r1 1m r2 1m c1 c2 vdd
product specification pe42420 page 11 of 12 document no. doc-14514-3 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. top view bottom view side view recommended land pattern a 0.10 c (2x) c 0.10 c 0.08 c seating plane b 0.10 c (2x) pin #1 corner 4.00 4.00 0.940.07 0.700.04 2.000.05 2.000.05 0.400.05 (x20) 0.260.05 (x20) 0.50 0.10 2.00 ref (x16) 0.31 (x20) 0.60 (x20) 2.05 2.05 4.20 4.20 0.50 (x16) 1 5 6 10 11 15 16 20 figure 21. package drawing 20-lead 4x4 mm lga figure 22. top marking specifications 42420 yyww zzzzz = pin 1 designator yyww = date code zzzzz = last five digits of lot number doc-0033 doc-01641
product specification pe42420 page 12 of 12 document no. doc-14514-3 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. tape feed direction notes: 1. 10 sprocket hole pitch cumulative tolerance 0.02 2. camber not to exceed 1 mm in 100 mm 3. material: ps + c 4. ao and bo measured as indicated 5. ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier 6. pocket position relative to sprocket hole measured as true position of pocket, not pocket hole ao = 4.35 mm bo = 4.35 mm ko = 1.1 mm figure 23. tape and reel drawing table 6. ordering information order code description package shipping method pe42420lgbb-z pe42420 spdt rf switch green 20-lead 4x4 mm lga 3000 units / t&r ek42420-02 pe42420 evaluation ki t evaluation kit 1 / box advance information : the product is in a formative or design stage. the datasheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification: the datasheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification: the datasheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify custom ers of the intended changes by issuing a cnf (customer notification form). the information in this datasheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. the peregrine name, logo, ultracmos and utsi are registered trademarks and harp, multiswitch and dune are trademarks of peregrine semiconductor corp. peregr ine products are protected under one or more of the following u.s. patents: http://patents.psemi.com . sales contact and information for sales and contact information please visit www.psemi.com .

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